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Opportunities · Part-time opportunity · Summer 2027

SiGe HBT Device Modelling Intern (Summer 2027)

GlobalFoundries

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Pay
about $10-$43/hr
When
Summer 2027
Where
Essex Junction, VT · On-site

Before you apply

GPA
Must have at least an overall 3.5 GPA and be in good academic standing.
Graduation
Design Manual Publishing & Ground Rule Validation Engineer (2027 New College Graduate)

What you'll do

  • Employment type
  • Full-time
  • Industries

What they want

Required

  • Education – At least a second-year graduate student at time of application and actively pursuing a Master’s, or PhD in Electrical Engineering, Microelectronics or related field through an accredited degree program during the time of internship.
  • Language Fluency - English (Written & Verbal)
  • Ability to work at least 20 to 40 hours per week during the internship.

Nice to have

  • Prior related internship or co-op experience
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
  • Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
  • Strong written and verbal communication skills
About GlobalFoundries

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SiGe HBT Device Modelling Intern (Summer 2027)

GlobalFoundries

Essex Junction, VT

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SiGe HBT Device Modelling Intern (Summer 2027)

GlobalFoundries

Essex Junction, VT

1 month ago

28 applicants

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About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power‑efficient and high‑performance solutions for high‑growth markets. With global manufacturing operations across the U.S., Europe and Asia, GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com.

Internship Program Overview

Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Summary Of Role

In this position, the device modelling intern will collaborate with an RF device modeling team to develop device modeling capabilities for advanced semiconductor SiGe HBT devices. The responsibilities include applying device physics principles, characterizing devices using DC/RF methods, and utilizing the advanced HiCUM L2 V3.0 industry standard model to create compact models for RF applications. Additionally, modeling effects such as avalanche at high current densities and non-quasistatic phenomena will be compared with measurement data.

Essential Responsibilities Include

  • Analyze measurement data for DC and RF characteristics.
  • Develop HiCUM L2 V3.0 based compact model for HBT device.
  • Extract compact model parameters for advanced device physics.
  • Develop a procedure to incorporate new physical effects in the compact model and propose new models/modeling methods if applicable.
  • Presentation to technical team after the project completion.

Other Responsibilities

  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required qualifications

  • Education – At least a second-year graduate student at time of application and actively pursuing a Master’s, or PhD in Electrical Engineering, Microelectronics or related field through an accredited degree program during the time of internship.
  • Must have at least an overall 3.5 GPA and be in good academic standing.
  • Language Fluency - English (Written & Verbal)
  • Ability to work at least 20 to 40 hours per week during the internship.

Preferred qualifications

  • Prior related internship or co-op experience
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
  • Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
  • Strong written and verbal communication skills
  • Strong planning & organizational skills
  • Semiconductor device physics / characterization knowledge
  • Familiarity of Device Compact models
  • Familiarity with industry standard compact model: High Current Model (HiCUM)
  • Familiarity with design simulation tools such as Cadence Spectre or Keysight ADS
  • Familiarity with Design Layout using the Cadence Virtuosa, ADS or other design tools
  • Data analysis and problem solving
  • Knowledge with shell scripting, multi-paradigm (Matlab/R) and high-level programming languages (Python/Perl/Lisp)

#InternshipProgramUS

Expected Salary Range

$20.00 - $40.00

Expected Salary Range

$0.00 - $0.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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Seniority level

Internship

Employment type

Full-time

Industries

Semiconductor Manufacturing

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Posted

Aug 26, 2026

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