Opportunities · Research opportunity · Summer 2027
Digital IC Design Intern, MS - Summer 2027
Marvell Technology · Irvine, CA
Aggregator listingNew to UTern today≈$23-$49/hr
Role overview
What you'll own
- Develop and verify detailed, high-performance RTL design blocks and apply the digital design specifications for high-speed connectivity devices and next-generation chips
- Conduct synthesis, static timing analysis, timing signoff, and power analysis
- Collaborate with chip architecture, design verification, & physical design teams to solve complex problems and contribute to a team building real products
Requirements and eligibility
- Currently enrolled in a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027
- Summer 2028
- Completed courses focusing on circuit design, circuit theory, digital logic design, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing (DSP), SoC/ASIC design, or electronics
- Proficiency in programming & scripting languages like Python, Perl, Tcl
Dates for this one
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Posted
Sep 22, 2026
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