Opportunities · Internship
DFT Engineer Intern
Ambarella
Applies on Workday
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- Pay
- about $10-$35/hr
- Where
- US Headquarters
What you'll do
- Logic Design to support DFT features
- Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC
- Verification of DFT Logic and analysis of fault coverage
- Timing analysis for DFT Modes
What they want
- MSEE in Electrical / Computer Engineering
- Knowledge of DFT fundamentals
- Knowledge of Logic design & Static timing analysis
- Knowledge of Verilog and any scripting language
- Knowledge of AI assisted programming
About Ambarella
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
Full posting
AI Vision Processors For Edge Applications
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
Job description
Position responsibilities
- Logic Design to support DFT features
- Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC
- Verification of DFT Logic and analysis of fault coverage
- Timing analysis for DFT Modes
Minimum requirements
- MSEE in Electrical / Computer Engineering
- Knowledge of DFT fundamentals
- Knowledge of Logic design & Static timing analysis
- Knowledge of Verilog and any scripting language
- Knowledge of AI assisted programming
Dates for this one
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Posted
Aug 27, 2026
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